It has been common practice in the art of semiconductor fabrication to use strained epitaxially deposited semiconductor alloys in the source and drain to induce strain in the intervening channel. For example, Ge—Si alloy formed in trenches etched in the source and drain of a FET can induce compressive strain in a silicon channel (see, e.g., Thompson, et al., IEEE Transactions on Electron Devices, vol. 51, no. 11, p. 1790 (November 2004)). Or, for example, Si—C alloy can be epitaxially formed in trenches etched in the source and drain of a field-effect transistor (FET) to induce tensile strain in the channel (see, e.g., Ang, et al., IEEE IEDM Transactions, p. 1069 (2004)). These alloys may fully serve as the source and drain, or may be embedded within a larger source or drain, where the edge of the source is defined as the region directly providing electrons or holes to the channel, and the edge of the drain is defined as the region directly receiving electrons or holes from the channel, with electrons applicable to n-channel FETs, or with holes applicable to p-channel FETs.
The resulting strain may be beneficial to electron or hole transport through a semiconductor (see, e.g., Thompson, supra), or to the transport of electrons or holes between a metal and a semiconductor (see, e.g., Yagishita, et al., Japanese Journal of Applied Physics, vol. 43, no. 4B, pp. 1713-1716 (2004)). For example, in Si devices, there is typically a significant advantage for stresses of at least approximately 50 MPa, although the advantage of stress can continue to increase to beyond 1 GPa.